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Boeing: Associate Asic Fpga Development And Verification Engineer


This is a Full-time position in Los Angeles, CA posted August 30, 2020.

At Boeing, we are all innovators on a mission to connect, protect, explore and inspire.

From the sea bed to outer space, you’ll learn and grow, contributing to work that shapes the world.

Find your future with us.Position Boeing Defense Space & Security seeksAssociateASIC/FPGA Development and Verification Engineer to support the Satellite Capabilities organization and multiple satellite product lines based in El Segundo, CA.Position Responsibilities:Utilize high-level architectural documentation along with algorithm description and implement DSP functions for functions such as decimation, interpolation, general filtering, up-down conversion, digital beam forming, channelization, and be able to develop mathematical models in SystemVerilog to verify design implementation and develop and run scripts and Make files.Maintains detailed requirements and specifications for various electronic products.Develops detailed designs of limited scope.Conducts various methods of testing and analysis to support design.Gathers data for technical performance measures and performs basic analysis.Provides basic engineering support throughout the lifecycle of the product.

Conducts trade studies and literature research to support future product designs.Works under general supervision.This position offers relocation based on candidate eligibility.

Basic relocation is available for internal candidates.This position must meet Export Control compliance requirements, therefore a “US Person” as defined by 22 C.F.R.

§ 120.15 is required.

“US Person” includes US Citizen, lawful permanent resident, refugee, or asylee Basic Qualifications (Required Skills/Experience):Bachelor degree from an accredited course of study, in electrical engineering, computer engineering, software engineering, or computer science2 or more years’ experience in digital logic (ASIC or FPGA) design or a Master’s degree with experience.Educational or work experience using Verilog or SystemVerilog.Preferred Qualifications (Desired Skills/Experience):Experience designing digital logic using Verilog or SystemVerilogExperience simulating a digital design using Verilog or SystemVerilogExperience creating a simulation testbench from scratchExperience writing Universal Verification Methodology (UVM) sequencesWork experience as a digital design (ASIC or FPGA) engineer.Work experience as a digital design verification (ASIC or FPGA) engineer.Typical Education and ExperienceDegree and typical experience in engineering classification: Bachelor’s and 2 or more years’ experience or a Master’s degree with experience.

Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry.

ABET is the preferred, although not required, accreditation standard.Boeing is a Drug Free Workplace where post offer applicants and employees are subject to testing for marijuana, cocaine, opioids, amphetamines, PCP, and alcohol when criteria is met as outlined in our policies.